Demonstrating quantum speed-up with a two-transmon quantum processor

Andreas Dewes

SPEC

Thu, Nov. 15th 2012, 14:30

Abstract :

The thesis work discusses the characterization of a two-qubit processor implemented using capacitively coupled tunable superconducting qubits of the Transmon type. Each qubit can be manipulated and read out individually using a non-destructive single-shot readout. In addition, a universal two-qubit gate can be implemented using the interaction between the qubits. The system implements therefore all basic building blocks of a universal quantum processor. Using it, we implement the universal √(iSWAP) two-qubit gate, characterizing the gate operation by quantum process tomography and obtaining a gate fidelity of 90 %. We use this gate to create entangled two-qubit Bell states and perform a test of the CHSH Bell inequality, observing a violation of the classical boundary by 22 standard deviations after correcting for readout errors.

Using the implemented two-qubit gate, we run the so-called Grover search algorithm: For two qubits, this algorithm finds among four elements x ∈{00,01,10,11} the one element y that solves a search problem encoded by a function f for which f(y)=1 and f(x≠y)=0. Our implementation retrieves the correct answer to the search problem after a single evaluation of the function f(x) with a success probability between 52% and 67%, therefore outperforming classical algorithms that are bound to a success probability of 25%. This constitutes a proof-of-concept of the quantum speed-up for superconducting quantum processors.

Finally, we propose a scalable architecture for a superconducting quantum processor that can potentially overcome the scalability issues faced by todays superconducting qubit architectures.

Keywords: quantum information processing, quantum electrical circuits, superconducting devices, information quantique, circuits quantiques, supraconducteurs.

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